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interrupt wakeup conflicts with a UCS10 work around

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interrupt wakeup conflicts with a UCS10 work around

Bart Jooris
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the wakeup attribute on the ISRs seems to generate this epilogue:

b1 c0 f0 00 bic #240, 0(r1) ;#0x00f0, 0x0000(r1)
00 00
00 13       reti

but in order to implement a work around for UCS10 I need a way to keep SCG0 high.
I should be able to replace this

__bic_SR_register_on_exit(SCG0| SCG1| OSCOFF|CPUOFF)
by
__bic_SR_register_on_exit(SCG1|OSCOFF|CPUOFF)

somewhere, but for now all my attempts failed.

Thanks a lot,

Bart
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